This disclosure relates to integrated circuit devices and, more particularly, integrated circuit devices with component integrated circuits that communicate via a stitched silicon interposer.
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of these techniques, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of this disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Integrated circuit devices are found in a variety of electronic systems. Computers, handheld devices, portable phones, televisions, industrial control systems, and robotics, to name just a few, rely on integrated circuits. Because simply manufacturing larger and larger integrated circuits may exponentially reduce yields, many smaller integrated circuits may operate together to perform certain data processing operations. For example, a field programmable gate array (FPGA) chip may communicate with a memory chip to carry out certain data processing. In another example, several FPGA chips may operate together to carry out operations not possible with only one chip.
Many intercommunication schemes have been developed to improve the bandwidth and efficiency of communication between two integrated circuits. In one example, integrated circuits may be stacked and communicate with one another though wire bonding. Wire bonding, however, provides a limited number of chip-to-chip interconnects of relatively low bandwidth and efficiency. Another chip integration scheme to permit intercommunication between two integrated circuits involves a silicon interposer. A silicon interposer provides a silicon substrate patterned with chip-to-chip interconnects at various depths. Two or more component integrated circuits are bonded to the silicon interposer. The component integrated circuits can then communicate over the chip-to-chip interconnects at much higher bandwidth and efficiency than wire bonding.
A silicon interposer may be manufactured by patterning a silicon wafer using a lithography system. Lithography systems typically have a maximum size that each die on a silicon wafer can be made. This maximum patterning size is referred to as the “reticle limit” of the lithography system. Any single interconnect pattern, or mask database, patterned onto the wafer cannot exceed the reticle limit. As such, the size of the interposer has conventionally remained within the reticle limit of the lithography system used to manufacture the interposer. The size of the interposer limits the number and size of the component integrated circuits that can be installed on the interposer. Still, integrated circuit devices of higher capacity than possible within the reticle limit are desired.